Such a processor generally comprises a program counter supplying the addresses of the program memory from which successive instructions forming part of a given program (referred to hereinafter as macroinstructions) are to be read out, partly by incrementing an existing address in consecutive timing cycles. These macroinstructions can be of several different types, such as transfer instructions, input/output instructions and branching instructions. A transfer instruction calls for the exchange of data between units of the processor by way of a logical execution network which usually performs switching as well as arithmetic operations. An input/output instruction requires the transmission of data between the processor and one of several peripheral units served by it. A branching instruction specifies a jump to a memory address other than the one immediately following the address of the previously extracted macroinstruction.
Each of these operations encompasses a number of steps which are part of a microprogram performed with the aid of the aforementioned control unit. Thus, the microroutine established by the control unit involves the readout of a series of microinstructions from a memory within that unit which is addressed by a microprogram counter in essentially the same way in which the program memory of the processor is addressed by its counter. More particularly, the microprogram counter has a loading input connected to an address store from which a reference address is fed in at the beginning of a microroutine. Depending on certain bit combinations in the microinstructions successively read out, as well as on signals from the processor and other external sources, the microprogram counter is stepped in consecutive timing cycles to increment its count or is loaded with a new reference address in response to a jump command. Such a jump command may occur in the course of a microroutine or at the end thereof; in the latter instance it calls for a changeover to a new microroutine requiring the loading of a fresh starting address into the microprogram counter. The new microroutine may involve the analysis of another macroinstruction extracted from the program counter of the processor; it could, however, also require the execution of a macroinstruction analyzed in the preceding microroutine.
Since the determination of the starting address for a new microroutine depends on a variety of external factors, including the character of the macroinstruction read out next and a possible interruption of the current program by a signal from a peripheral unit, several ancillary operations must be performed preparatorily to the initiation of each microroutine. In conventional systems, these ancillary operations require considerable time which slow down the actual processing of data.